From c0bdf89ff458f84e332aa861809a23997ce1b905 Mon Sep 17 00:00:00 2001
From: Marc Jones <marcjones@sysproconsulting.com>
Date: Tue, 8 Dec 2020 21:55:32 -0700
Subject: soc/intel/xeon_sp/nvs: Use common global NVS

The xeon_sp ACPI NVS and ramstage NVS were out of sync. Since there
isn't anything uncommon with the soc NVS, use the Intel common NVS.
This covers the NVS cases of common code used by xeon_sp.  Update
the mainboards for this change.

Change-Id: Icf422f5b75a1ca7a3d8f3d63638b8d86a56fdd7b
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
---
 src/mainboard/ocp/deltalake/dsdt.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/ocp/deltalake')

diff --git a/src/mainboard/ocp/deltalake/dsdt.asl b/src/mainboard/ocp/deltalake/dsdt.asl
index 1541134e72..63aeb700c2 100644
--- a/src/mainboard/ocp/deltalake/dsdt.asl
+++ b/src/mainboard/ocp/deltalake/dsdt.asl
@@ -14,7 +14,7 @@ DefinitionBlock(
 	#include "acpi/platform.asl"
 
 	// global NVS and variables
-	#include <soc/intel/xeon_sp/acpi/globalnvs.asl>
+	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
 
 	#include <cpu/intel/common/acpi/cpu.asl>
 
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