From c2ce370f30b60daf60e23182cf01eb898d35fbbd Mon Sep 17 00:00:00 2001 From: Idwer Vollering Date: Sun, 5 Jan 2020 01:44:25 +0100 Subject: src/mainboard: remove MMIO macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This touches several mainboards. Replace the macro with C functions. The presence of bootblock.c is assumed. Change-Id: I583034ef0b0ed3e5a5e3dd680c57728ec5efbc8f Signed-off-by: Idwer Vollering Reviewed-on: https://review.coreboot.org/c/coreboot/+/37738 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/msi/ms7721/bootblock.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'src/mainboard/msi') diff --git a/src/mainboard/msi/ms7721/bootblock.c b/src/mainboard/msi/ms7721/bootblock.c index 9ee7a37d00..7274bc3317 100644 --- a/src/mainboard/msi/ms7721/bootblock.c +++ b/src/mainboard/msi/ms7721/bootblock.c @@ -19,12 +19,10 @@ #include #include #include -#include +#include #include #include -#define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) - /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */ #define SUPERIO_ADDRESS 0x4e @@ -76,14 +74,14 @@ static void sbxxx_enable_48mhzout(void) { /* most likely programming to 48MHz out signal */ u32 reg32; - reg32 = SB_MMIO_MISC32(0x28); + reg32 = misc_read32(0x28); reg32 &= 0xffc7ffff; reg32 |= 0x00100000; - SB_MMIO_MISC32(0x28) = reg32; + misc_write32(0x28, reg32); - reg32 = SB_MMIO_MISC32(0x40); + reg32 = misc_read32(0x40); reg32 &= ~0x80u; - SB_MMIO_MISC32(0x40) = reg32; + misc_write32(0x40, reg32); } void bootblock_mainboard_early_init(void) -- cgit v1.2.3