From bcb8c97af94c9fc814fdbdafe5361666bf81d442 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sun, 25 Apr 2010 18:06:32 +0000 Subject: try to unify timing initialization across those boards that need it... Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/msi/ms7260/romstage.c | 4 ++-- src/mainboard/msi/ms9282/romstage.c | 17 ++++++++--------- src/mainboard/msi/ms9652_fam10/romstage.c | 3 +++ 3 files changed, 13 insertions(+), 11 deletions(-) (limited to 'src/mainboard/msi') diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 9f84911b36..3f7b69dc1b 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -237,6 +237,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif + init_timer(); /* Need to use TMICT to synconize FID/VID. */ + needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); needs_reset |= mcp55_early_setup_x(); @@ -253,9 +255,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_smbus(); - /* Do we need apci timer, tsc...., only debug need it for better output */ /* All AP stopped? */ - // init_timer(); /* Need to use TMICT to synconize FID/VID. */ sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 87517f078c..ee44ea2ad3 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -199,16 +199,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn - needs_reset = optimize_link_coherent_ht(); + init_timer(); /* Need to use TMICT to synconize FID/VID. */ - needs_reset |= optimize_link_incoherent_ht(sysinfo); + needs_reset = optimize_link_coherent_ht(); + needs_reset |= optimize_link_incoherent_ht(sysinfo); + needs_reset |= mcp55_early_setup_x(); - needs_reset |= mcp55_early_setup_x(); - - if (needs_reset) { - print_info("ht reset -\n"); - soft_reset(); - } + if (needs_reset) { + print_info("ht reset -\n"); + soft_reset(); + } //It's the time to set ctrl now; fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); @@ -226,6 +226,5 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); - } diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 0d2f80fcf8..c1cb92c8f6 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -58,6 +58,8 @@ #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" #include "northbridge/amd/amdfam10/raminit.h" #include "northbridge/amd/amdfam10/amdfam10.h" +#include "cpu/amd/model_fxx/apic_timer.c" +#include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" @@ -262,6 +264,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr=rdmsr(0xc0010071); printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif + init_timer(); /* Need to use TMICT to synconize FID/VID. */ wants_reset = mcp55_early_setup_x(); -- cgit v1.2.3