From abc0c7791e18dbd97949a49016f9ebedb823ed84 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 5 Oct 2010 17:59:12 +0000 Subject: attached patch moves a couple more config flags out of romstage: CK804_USE_NIC, CK804_USE_ACI, CK804_NUM. MCP55_USE_NIC, MCP55_USE_ACI, MCP55_NUM. Signed-off-by: Patrick Georgi Signed-off-by: Myles Watson Acked-by: Myles Watson Acked-by: Pter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/msi/ms7135/Kconfig | 2 ++ src/mainboard/msi/ms7135/romstage.c | 4 ---- src/mainboard/msi/ms7260/Kconfig | 2 ++ src/mainboard/msi/ms7260/romstage.c | 3 --- src/mainboard/msi/ms9282/romstage.c | 1 - src/mainboard/msi/ms9652_fam10/Kconfig | 2 ++ src/mainboard/msi/ms9652_fam10/romstage.c | 4 ---- 7 files changed, 6 insertions(+), 12 deletions(-) (limited to 'src/mainboard/msi') diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig index 1d3e7d18b1..1f8628d2b0 100644 --- a/src/mainboard/msi/ms7135/Kconfig +++ b/src/mainboard/msi/ms7135/Kconfig @@ -15,6 +15,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MP_TABLE select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 + select CK804_USE_NIC + select CK804_USE_ACI config MAINBOARD_DIR string diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index 25c42014b4..78ac703b65 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -43,10 +43,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" -/* Used by ck804_early_setup(). */ -#define CK804_USE_NIC 1 -#define CK804_USE_ACI 1 - #include #include #include "northbridge/amd/amdk8/incoherent_ht.c" diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index 106db7b70b..a7f9e1afe6 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -8,6 +8,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_MCP55 + select MCP55_USE_NIC + select MCP55_USE_AZA select SUPERIO_WINBOND_W83627EHG select HAVE_BUS_CONFIG select HAVE_OPTION_TABLE diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 762da8ced5..ebd54f4ef5 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -92,9 +92,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#define MCP55_NUM 1 -#define MCP55_USE_NIC 1 -#define MCP55_USE_AZA 1 #define MCP55_PCI_E_X_0 0 #define MCP55_MB_SETUP \ diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 8935709323..8facf05f3a 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -105,7 +105,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#define MCP55_NUM 1 #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" //set GPIO to input mode #define MCP55_MB_SETUP \ diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig index 7e0896536c..1404de8680 100644 --- a/src/mainboard/msi/ms9652_fam10/Kconfig +++ b/src/mainboard/msi/ms9652_fam10/Kconfig @@ -8,6 +8,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select DIMM_REGISTERED select NORTHBRIDGE_AMD_AMDFAM10 select SOUTHBRIDGE_NVIDIA_MCP55 + select MCP55_USE_NIC + select MCP55_USE_AZA select SUPERIO_WINBOND_W83627EHG select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index a7dcaedb3d..b0696087df 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -89,10 +89,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/quadcore/quadcore.c" -#define MCP55_NUM 1 -#define MCP55_USE_NIC 1 -#define MCP55_USE_AZA 1 - #define MCP55_PCI_E_X_0 1 #define MCP55_MB_SETUP \ -- cgit v1.2.3