From 60f0f1b18f87332a569ced6c8744a1572517ba39 Mon Sep 17 00:00:00 2001 From: Joseph Smith Date: Fri, 29 May 2009 13:45:22 +0000 Subject: enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx southbridge. Signed-off-by: Joseph Smith Acked-by: Ronald G. Minnich Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/msi/ms6178/Config.lb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/msi') diff --git a/src/mainboard/msi/ms6178/Config.lb b/src/mainboard/msi/ms6178/Config.lb index bfaf8f6f43..773d813922 100644 --- a/src/mainboard/msi/ms6178/Config.lb +++ b/src/mainboard/msi/ms6178/Config.lb @@ -82,6 +82,9 @@ chip northbridge/intel/i82810 # Northbridge # end end chip southbridge/intel/i82801xx # Southbridge + register "ide0_enable" = "1" + register "ide1_enable" = "1" + device pci 1e.0 on end # PCI bridge device pci 1f.0 on # ISA/LPC bridge chip superio/winbond/w83627hf # Super I/O -- cgit v1.2.3