From 4549e5a6650b4d4634a46285796e63e31c99f9c8 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Sun, 2 Feb 2014 22:05:48 +0100 Subject: =?UTF-8?q?AMD=20K8=20boards=E2=80=99=20`romstage.c`:=20Spell=20sy?= =?UTF-8?q?nc*hr*onize=20correctly?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I92e6e7f1292f66642aa0336064a4eccba104dd08 Signed-off-by: Paul Menzel Reviewed-on: http://review.coreboot.org/5101 Reviewed-by: Rudolf Marek Reviewed-by: Alexandru Gagniuc Tested-by: build bot (Jenkins) --- src/mainboard/msi/ms7260/romstage.c | 2 +- src/mainboard/msi/ms9185/romstage.c | 2 +- src/mainboard/msi/ms9282/romstage.c | 2 +- src/mainboard/msi/ms9652_fam10/romstage.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard/msi') diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index d2e761a828..e1fef43682 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif - init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */ needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index e86cb854ef..c1faab512d 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) //do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID +// init_timer(); // Need to use TMICT to synchronize FID/VID sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index fc542513d5..98aacf2792 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -149,7 +149,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn - init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */ needs_reset = optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index cdeaf7b684..45f05a59bc 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -203,7 +203,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr=rdmsr(0xc0010071); printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif - init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */ wants_reset = mcp55_early_setup_x(); -- cgit v1.2.3