From c36b5ea18983e3dbb021ae3012698d1357dcdf66 Mon Sep 17 00:00:00 2001 From: Keith Hui Date: Mon, 5 Feb 2024 16:11:26 -0500 Subject: mb/*: Copy bd82x6x boards' USB port config into devicetree For mainboards using southbridge/intel/bd82x6x, copy the contents of mainboard_usb_ports array into southbridge devicetree. In-line comments are maintained. Boards also capable of using MRC raminit are done in a separate patch. Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25 Signed-off-by: Keith Hui Reviewed-on: https://review.coreboot.org/c/coreboot/+/81879 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/mainboard/msi/ms7707/devicetree.cb | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/mainboard/msi/ms7707') diff --git a/src/mainboard/msi/ms7707/devicetree.cb b/src/mainboard/msi/ms7707/devicetree.cb index 90eea95cb7..df1696ae8b 100644 --- a/src/mainboard/msi/ms7707/devicetree.cb +++ b/src/mainboard/msi/ms7707/devicetree.cb @@ -17,6 +17,22 @@ chip northbridge/intel/sandybridge register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005" register "gpe0_en" = "0x28000040" + register "usb_port_config" = "{ + {1, 0, 0}, + {1, 0, 0}, + {1, 0, 1}, + {1, 0, 1}, + {1, 0, 2}, + {1, 0, 2}, + {1, 0, 3}, + {1, 0, 3}, + {1, 0, 4}, + {1, 0, 4}, + {1, 0, 6}, + {1, 0, 5}, + {1, 0, 5}, + {1, 0, 6} + }" device ref mei1 on end # Management Engine Interface 1 device ref mei2 off end # Management Engine Interface 2 -- cgit v1.2.3