From b70a45afd0eed934c3cd6a1f2abe162061173bfd Mon Sep 17 00:00:00 2001 From: Michael Gold Date: Sun, 5 Jul 2009 19:29:39 +0000 Subject: Add support for the Mitac 6513WU mainboard, a Compaq OEM board using the i810 chipset. Not all hardware has been tested, but my test PC boots Linux (via FILO) without any problems. Also: Add support for the SMSC LPC47U33X to the generic 'smscsuperio' driver. Signed-off-by: Michael Gold Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4401 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/mitac/6513wu/irq_tables.c | 63 +++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 src/mainboard/mitac/6513wu/irq_tables.c (limited to 'src/mainboard/mitac/6513wu/irq_tables.c') diff --git a/src/mainboard/mitac/6513wu/irq_tables.c b/src/mainboard/mitac/6513wu/irq_tables.c new file mode 100644 index 0000000000..5df20ba644 --- /dev/null +++ b/src/mainboard/mitac/6513wu/irq_tables.c @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2009 Michael Gold + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include + +/* + * Each of PIRQA..D can be routed to IRQ 3-7, 9-12, 14, or 15; but the + * selected IRQs can't be shared with ISA devices (Intel DS 290655-003, + * section 5.7.6). + * + * Correspondingly, the IRQs used on the Super I/O (4,6,7,10,12) are + * excluded from the masks, leaving 0xca28 (3,5,9,11,14,15). + */ + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ + 0x00, /* Interrupt router bus */ + (0x1f << 3) | 0x0, /* Interrupt router dev */ + 0, /* IRQs devoted exclusively to PCI usage */ + 0x8086, /* Vendor */ + 0x7000, /* Device */ + 0, /* Miniport */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0xb6, /* Checksum (has to be set to some value that + * would give 0 after the sum of all bytes + * for this structure (including checksum). + */ + { + /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + {0x00, (0x1f << 3) | 0x0, {{0x00, 0x0000}, {0x61, 0xca28}, {0x00, 0x0000}, {0x63, 0xca28}}, 0x0, 0x0}, + {0x00, (0x1e << 3) | 0x0, {{0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}}, 0x0, 0x0}, + {0x00, (0x01 << 3) | 0x0, {{0x60, 0xca28}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + {0x01, (0x05 << 3) | 0x0, {{0x63, 0xca28}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, + {0x01, (0x08 << 3) | 0x0, {{0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}}, 0x1, 0x0}, + {0x01, (0x09 << 3) | 0x0, {{0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}, {0x60, 0xca28}}, 0x2, 0x0}, + {0x01, (0x0a << 3) | 0x0, {{0x62, 0xca28}, {0x63, 0xca28}, {0x60, 0xca28}, {0x61, 0xca28}}, 0x3, 0x0}, + {0x01, (0x0b << 3) | 0x0, {{0x63, 0xca28}, {0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}}, 0x4, 0x0}, + } +}; + +unsigned long write_pirq_routing_table(unsigned long addr) +{ + return copy_pirq_routing_table(addr); +} -- cgit v1.2.3