From 66bea528cfde9dea3d84ca571b7cca94964850c4 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Tue, 25 Oct 2016 19:11:07 -0700 Subject: riscv: add the lowrisc/nexys4ddr mainboard This was tested at the coreboot meeting in Berlin. The uart programming may still not be right but when used with the lowrisc bitstream for the board we were able to load and start linux, although it does not yet get far due to PTE version issues with lowrisc. Change-Id: Ia1de1a92762631c9d7bb3d41b04f95296144caa3 Signed-off-by: Ronald G. Minnich Reviewed-on: https://review.coreboot.org/17132 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/lowrisc/nexys4ddr/uart.c | 40 ++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 src/mainboard/lowrisc/nexys4ddr/uart.c (limited to 'src/mainboard/lowrisc/nexys4ddr/uart.c') diff --git a/src/mainboard/lowrisc/nexys4ddr/uart.c b/src/mainboard/lowrisc/nexys4ddr/uart.c new file mode 100644 index 0000000000..e3c233f80b --- /dev/null +++ b/src/mainboard/lowrisc/nexys4ddr/uart.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +uintptr_t uart_platform_base(int idx) +{ + return (uintptr_t) 0x42000000; +} + +/* these are currently not quite right but they are here for reference + * and will be fixed when lowrisc gives us a standard clock + * and set of values. */ +// divisor = clk_freq / (16 * Baud) +unsigned int uart_input_clock_divider(void) +{ + return (25 * 1000 * 1000u / (16u * 115200u)) % 0x100; +} + +// System clock 25 MHz, 115200 baud rate +unsigned int uart_platform_refclk(void) +{ + return (25 * 1000 * 1000u / (16u * 115200u)) >> 8; +} -- cgit v1.2.3