From 50863daef8ed75c0cb3dfd375e7622c898de5821 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 1 Oct 2021 14:37:30 -0600 Subject: src/mainboard to src/security: Fix spelling errors These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held Reviewed-by: Angel Pons --- src/mainboard/lippert/frontrunner-af/dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/lippert') diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl index 5d1e2613ba..e35a70b8ae 100644 --- a/src/mainboard/lippert/frontrunner-af/dsdt.asl +++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl @@ -535,7 +535,7 @@ DefinitionBlock ( * The Secondary bus range for PCI0 lets the system * know what bus values are allowed on the downstream * side of this PCI bus if there is a PCI-PCI bridge. - * PCI busses can have 256 secondary busses which + * PCI buses can have 256 secondary buses which * range from [0-0xFF] but they do not need to be * sequential. */ -- cgit v1.2.3