From 3db86ccfd7caaec5a1c494dfe3bfe9b092837f65 Mon Sep 17 00:00:00 2001 From: Jens Rottmann Date: Thu, 21 Mar 2013 22:31:19 +0100 Subject: FrontRunner/Toucan-AF: Use SPD read code from F14 wrapper Changes: - Get rid of the LiPPERT FrontRunner-AF and Toucan-AF mainboard specific code and use the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: I4ee5e1bc34f4caee20615c48248d4f7605c09377 Signed-off-by: Jens Rottmann Reviewed-on: http://review.coreboot.org/2874 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel --- src/mainboard/lippert/toucan-af/mainboard.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/mainboard/lippert/toucan-af/mainboard.c') diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index 367397e97c..f6cf09c63a 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -150,6 +150,15 @@ static void mainboard_enable(device_t dev) *(misc_mem_clk_cntrl + 2) = 0x00; *(misc_mem_clk_cntrl + 3) = 0x00; *(misc_mem_clk_cntrl + 4) = 0x00; + + /* + * Initialize ASF registers to an arbitrary address because someone + * long ago set things up this way inside the SPD read code. The + * SPD read code has been made generic and moved out of the board + * directory, so the ASF init is being done here. + */ + pm_iowrite(0x29, 0x80); + pm_iowrite(0x28, 0x61); } struct chip_operations mainboard_ops = { -- cgit v1.2.3