From 68c9f2bdc50d5bf51a3d09dc6ebc51bed2ec5d30 Mon Sep 17 00:00:00 2001 From: Jens Rottmann Date: Fri, 1 Mar 2013 17:20:42 +0100 Subject: LiPPERT Toucan-AF [2/2]: actually implement mainboard support Step 2: change the Persimmon code to adapt it to the new board's hardware. The Toucan-AF is a COM Express Compact Type 6 form factor embedded board: - AMD Fusion G-T56N (1.65 GHz dual core) or T40R (1 GHz single core) APU - 1-4 GB DDR3 memory down - 1x VGA, 2x DisplayPort (1 switchable to LVDS) - AMD A55E (Hudson-E1) southbridge - 8x USB 2.0 - 4x SATA - HD Audio (with codec on baseboard) - NEC uPD78F0532 microcontroller on I2C ("SEMA") - 7x PCIe2.0 x1 (1 on PEG) - Intel I210 GbE (on APU PCIe x1, can be disabled for additional PCIe) - 2x SST 25VF032B (SO8, soldered) 4 MB SPI flash (BIOS and failsafe BIOS) The Toucan-AF has no SIO on board. This patch includes basic support for a Winbond W83627DHG (PS/2, 2x RS232), because the ADLINK ExpressBase-6 used for evaluation happens to have one. The code may have to be adapted to the actual baseboard of the application. http://www.adlinktech.com/PD/web/PD_detail.php?pid=1132 Change-Id: I9041b905bad45852ac9b402fcbd5decbc98b377b Signed-off-by: Jens Rottmann Reviewed-on: http://review.coreboot.org/2572 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/lippert/toucan-af/BiosCallOuts.c | 67 +++++++++----------------- 1 file changed, 22 insertions(+), 45 deletions(-) (limited to 'src/mainboard/lippert/toucan-af/BiosCallOuts.c') diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c index 9bad4f4490..936ce9bf78 100644 --- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c +++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c @@ -22,7 +22,6 @@ #include "dimmSpd.h" #include "BiosCallOuts.h" #include "heapManager.h" -#include "SB800.h" STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -445,9 +444,25 @@ AGESA_STATUS BiosHookBeforeDQSTraining (UINT32 Func, UINT32 Data, VOID *ConfigPt /* Call the host environment interface to provide a user hook opportunity. */ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { - // Unlike e.g. AMD Inagua, Persimmon is unable to vary the RAM voltage. - // Make sure the right speed settings are selected. - ((MEM_DATA_STRUCT*)ConfigPtr)->ParameterListPtr->DDR3Voltage = VOLT1_5; + MEM_DATA_STRUCT *MemData = ConfigPtr; + + printk(BIOS_INFO, "Setting DDR3 voltage: "); + FCH_IOMUX(65) = 1; // GPIO65: VMEM_LV_EN# lowers VMEM from 1.5 to 1.35V + switch (MemData->ParameterListPtr->DDR3Voltage) { + case VOLT1_25: // board is not able to provide this + MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry + printk(BIOS_INFO, "can't provide 1.25 V, using "); + // fall through + default: // AGESA.h says in mixed case 1.5V DIMMs get excluded + case VOLT1_35: + FCH_GPIO(65) = 0x08; // = output, disable PU, set to 0 + printk(BIOS_INFO, "1.35 V\n"); + break; + case VOLT1_5: + FCH_GPIO(65) = 0xC8; // = output, disable PU, set to 1 + printk(BIOS_INFO, "1.5 V\n"); + } + return AGESA_SUCCESS; } @@ -465,45 +480,7 @@ AGESA_STATUS BiosHookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *Conf /* PCIE slot reset control */ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { - AGESA_STATUS Status; - UINTN FcnData; - PCIe_SLOT_RESET_INFO *ResetInfo; - - UINT32 GpioMmioAddr; - UINT32 AcpiMmioAddr; - UINT8 Data8; - UINT16 Data16; - - FcnData = Data; - ResetInfo = ConfigPtr; - // Get SB800 MMIO Base (AcpiMmioAddr) - WriteIo8(0xCD6, 0x27); - Data8 = ReadIo8(0xCD7); - Data16=Data8<<8; - WriteIo8(0xCD6, 0x26); - Data8 = ReadIo8(0xCD7); - Data16|=Data8; - AcpiMmioAddr = (UINT32)Data16 << 16; - Status = AGESA_UNSUPPORTED; - GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; - switch (ResetInfo->ResetId) - { - case 46: // GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot - switch (ResetInfo->ResetControl) { - case AssertSlotReset: - Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); - Data8 &= ~(UINT8)BIT6 ; - Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8); - Status = AGESA_SUCCESS; - break; - case DeassertSlotReset: - Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); - Data8 |= BIT6 ; - Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8); - Status = AGESA_SUCCESS; - break; - } - break; - } - return Status; + // COM Express doesn't provide dedicated resets for individual lanes + // and it's not needed for the on-board Intel I210 GbE controller. + return AGESA_UNSUPPORTED; } -- cgit v1.2.3