From b9f9f6c12b1a98ce76e3546e9f900ecb45e3c95c Mon Sep 17 00:00:00 2001
From: Michał Żygowski <michal.zygowski@3mdeb.com>
Date: Fri, 21 Dec 2018 12:23:27 +0100
Subject: mb/libretrend/lt1000: Add Libretrend LT1000 mainboard
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Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
---
 src/mainboard/libretrend/lt1000/dsdt.asl | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 src/mainboard/libretrend/lt1000/dsdt.asl

(limited to 'src/mainboard/libretrend/lt1000/dsdt.asl')

diff --git a/src/mainboard/libretrend/lt1000/dsdt.asl b/src/mainboard/libretrend/lt1000/dsdt.asl
new file mode 100644
index 0000000000..624806ca04
--- /dev/null
+++ b/src/mainboard/libretrend/lt1000/dsdt.asl
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* This file is part of the coreboot project. */
+
+#include <arch/acpi.h>
+DefinitionBlock(
+	"dsdt.aml",
+	"DSDT",
+	0x02,		/* DSDT revision: ACPI v2.0 and up */
+	OEM_ID,
+	ACPI_TABLE_CREATOR,
+	0x20110725	/* OEM revision */
+)
+{
+	#include <soc/intel/skylake/acpi/platform.asl>
+	#include <soc/intel/skylake/acpi/globalnvs.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
+
+	Device (\_SB.PCI0)
+	{
+		#include <soc/intel/skylake/acpi/systemagent.asl>
+		#include <soc/intel/skylake/acpi/pch.asl>
+	}
+
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
+}
-- 
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