From 56ae8a0b0faf1ca009e977dbd05cd9f0ea3fc2eb Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Sat, 16 Aug 2014 10:59:02 +0200 Subject: gm45: Decrease MTRR usage Change-Id: I4c790b0eaf2af94286e6691281fcad3d14659a99 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/6687 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/mainboard/lenovo/x200/romstage.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/mainboard/lenovo') diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c index 816fde4222..dcb4e16415 100644 --- a/src/mainboard/lenovo/x200/romstage.c +++ b/src/mainboard/lenovo/x200/romstage.c @@ -126,13 +126,14 @@ void main(unsigned long bist) /* RAM initialization */ enter_raminit_or_reset(); + memset(&sysinfo, 0, sizeof(sysinfo)); sysinfo.spd_map[0] = 0x50; sysinfo.spd_map[2] = 0x51; + sysinfo.enable_igd = 1; + sysinfo.enable_peg = 0; get_gmch_info(&sysinfo); raminit(&sysinfo, s3resume); - raminit_thermal(&sysinfo); - init_igd(&sysinfo, 0, 1); /* Enable IGD, disable PEG. */ const u32 deven = pci_read_config32(MCH_DEV, D0F0_DEVEN); /* Disable D4F0 (unknown signal controller). */ pci_write_config32(MCH_DEV, D0F0_DEVEN, deven & ~0x4000); -- cgit v1.2.3