From 53052fe5eefe8396b334e8bc8c1014fca4062a8f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 27 Apr 2016 09:04:11 +0300 Subject: AGESA boards: Relocate platform memory config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit File buildOpts.c is a can of worms, pull platform memory configuration in to OemCustomize.c. This array should be assigned at runtime instead of linking a modified defaults table. Change-Id: I73d9d3fbc165e6c10472e105576d7c40820eaa6a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/14528 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/lenovo/g505s/OemCustomize.c | 25 +++++++++++++++++++++++++ src/mainboard/lenovo/g505s/buildOpts.c | 23 ----------------------- 2 files changed, 25 insertions(+), 23 deletions(-) (limited to 'src/mainboard/lenovo') diff --git a/src/mainboard/lenovo/g505s/OemCustomize.c b/src/mainboard/lenovo/g505s/OemCustomize.c index 9ea6c656c9..605c7d3f9c 100644 --- a/src/mainboard/lenovo/g505s/OemCustomize.c +++ b/src/mainboard/lenovo/g505s/OemCustomize.c @@ -19,6 +19,7 @@ #include #include +#include #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE @@ -197,6 +198,30 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) return AGESA_SUCCESS; } +/*---------------------------------------------------------------------------------------- + * CUSTOMER OVERIDES MEMORY TABLE + *---------------------------------------------------------------------------------------- + */ + +/* + * Platform Specific Overriding Table allows IBV/OEM to pass in platform + * information to AGESA + * (e.g. MemClk routing, the number of DIMM slots per channel,...). + * If PlatformSpecificTable is populated, AGESA will base its settings on the + * data from the table. Otherwise, it will use its default conservative settings + */ +CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { + + NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1), + NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), + MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), + ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), + CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + + PSO_END +}; + const struct OEM_HOOK OemCustomize = { .InitEarly = OemInitEarly, .InitMid = OemInitMid, diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c index 7b491d41fc..d633d07897 100644 --- a/src/mainboard/lenovo/g505s/buildOpts.c +++ b/src/mainboard/lenovo/g505s/buildOpts.c @@ -402,26 +402,3 @@ SCI_MAP_CONTROL lenovo_g505s_sci_map[] = { /* AGESA nonsense: this header depends on the definitions above */ #include -/*---------------------------------------------------------------------------------------- - * CUSTOMER OVERIDES MEMORY TABLE - *---------------------------------------------------------------------------------------- - */ - -/* - * Platform Specific Overriding Table allows IBV/OEM to pass in platform - * information to AGESA - * (e.g. MemClk routing, the number of DIMM slots per channel,...). - * If PlatformSpecificTable is populated, AGESA will base its settings on the - * data from the table. Otherwise, it will use its default conservative settings - */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { - - NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1), - NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), - MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), - ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), - CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - - PSO_END -}; -- cgit v1.2.3