From 81dd52b7eb663c6098de5d8c7c56ed572c91b539 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Thu, 29 Dec 2016 22:46:12 +0100 Subject: intel/i945: Factor out ram init time stamps MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of having the code for the RAM init time stamps in each mainboard’s `romstage.c`, factor it out to the northbridge code, done in commit 771328f7 (intel/i945: add timestamps in romstage). Change-Id: Ibb699a1fea2f0b1f3c6564d401542d2fb3249f5a Signed-off-by: Paul Menzel Reviewed-on: https://review.coreboot.org/17994 Reviewed-by: Elyes HAOUAS Tested-by: build bot (Jenkins) --- src/mainboard/lenovo/x60/romstage.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/lenovo/x60') diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 81ee5da7d3..fb2b9e172b 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -225,9 +225,7 @@ void mainboard_romstage_entry(unsigned long bist) dump_spd_registers(); #endif - timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(s3resume ? 2 : 0, spd_addrmap); - timestamp_add_now(TS_AFTER_INITRAM); /* Perform some initialization that must run before stage2 */ early_ich7_init(); -- cgit v1.2.3