From b0922f0183cb50b9714285c539c387956d86814c Mon Sep 17 00:00:00 2001 From: Nicolas Reinecke Date: Sun, 1 Feb 2015 02:53:35 +0100 Subject: lenovo: fix smi gpe + wakeup pin for t420s t520 t530 x220 x230 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set correct gpio routing and enable bits for EC SMI gpio and EC WAKE gpio. Verified with schematics. Change-Id: Ie3b98c4456a870c881e7663b19eb8ca8e5564c5c Signed-off-by: Nicolas Reinecke Reviewed-on: http://review.coreboot.org/8358 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens Reviewed-by: Kyösti Mälkki --- src/mainboard/lenovo/x220/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/lenovo/x220/devicetree.cb') diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 982e30bb09..6eb3b1578d 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -54,7 +54,7 @@ chip northbridge/intel/sandybridge # 2 SCI (if corresponding GPIO_EN bit is also set) register "alt_gp_smi_en" = "0x0000" register "gpi1_routing" = "2" - register "gpi8_routing" = "2" + register "gpi13_routing" = "2" # Enable SATA ports 0 (HDD bay) & 1 (dock) & 2 (msata) register "sata_port_map" = "0x7" -- cgit v1.2.3