From b85a87b7d6f9f12d5c71c32741c8af731ed6be7e Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Mon, 29 Dec 2014 11:32:27 +0200
Subject: intel SMI handlers: Refactor GPI SMI/SCI routing
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Move the GPI interrupt routing selection between SMI/SCI from
mainboards to southbridge. There is speculation if this is all
just legacy APM stuff that could be removed with a followup.

Change-Id: Iab14cf347584513793f417febc47f0559e17f5a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/7967
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
---
 src/mainboard/lenovo/x201/smihandler.c | 32 +++-----------------------------
 1 file changed, 3 insertions(+), 29 deletions(-)

(limited to 'src/mainboard/lenovo/x201/smihandler.c')

diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index 7b14191683..35d9605744 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -148,15 +148,6 @@ static int mainboard_finalized = 0;
 
 int mainboard_smi_apmc(u8 data)
 {
-	u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
-	u8 tmp;
-
-	printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase,
-	       data);
-
-	if (!pmbase)
-		return 0;
-
 	switch (data) {
 	case APM_CNT_FINALIZE:
 		printk(BIOS_DEBUG, "APMC: FINALIZE\n");
@@ -176,11 +167,7 @@ int mainboard_smi_apmc(u8 data)
 		/* use 0x1600/0x1604 to prevent races with userspace */
 		ec_set_ports(0x1604, 0x1600);
 		/* route H8SCI to SCI */
-		outw(inw(pmbase + ALT_GP_SMI_EN) & ~(1<<GPE_EC_SCI), pmbase + ALT_GP_SMI_EN);
-		tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
-		tmp &= ~0x03;
-		tmp |= 0x02;
-		pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
+		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
 		/* discard all events, and enable attention */
 		ec_write(0x80, 0x01);
 		break;
@@ -189,12 +176,7 @@ int mainboard_smi_apmc(u8 data)
 		   provide a EC query function */
 		ec_set_ports(0x66, 0x62);
 		/* route H8SCI# to SMI */
-		outw(inw(pmbase + ALT_GP_SMI_EN) | (1<<GPE_EC_SCI),
-		     pmbase + ALT_GP_SMI_EN);
-		tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
-		tmp &= ~0x03;
-		tmp |= 0x01;
-		pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
+		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
 		/* discard all events, and enable attention */
 		ec_write(0x80, 0x01);
 		break;
@@ -210,16 +192,8 @@ void mainboard_smi_sleep(u8 slp_typ)
 		u8 ec_wake = ec_read(0x32);
 		/* If EC wake events are enabled, enable wake on EC WAKE GPE.  */
 		if (ec_wake & 0x14) {
-			u32 gpe_rout;
-			u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
-
-			/* Enable EC WAKE GPE.  */
-			outl(inl(pmbase + GPE0_EN) | (1 << (16 + GPE_EC_WAKE)), pmbase + GPE0_EN);
-			gpe_rout = pci_read_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT);
 			/* Redirect EC WAKE GPE to SCI.  */
-			gpe_rout &= ~(3 << (2 * GPE_EC_WAKE));
-			gpe_rout |= (2 << (2 * GPE_EC_WAKE));
-			pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT, gpe_rout);
+			gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
 		}
 	}
 }
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