From 606b8bccb53e5bbc840d29657faaf333eff51e38 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 24 Oct 2016 17:44:20 +0200 Subject: nb/gm45/gma.c: Remove writes to DP, FDI registers Those registers are only used on more recent Intel platforms featuring a PCH. The DP registers on G4X hardware are at a different offset. Change-Id: Ib49e54d4e7d6595dc09fb1be35ac8178b80c7f71 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/17110 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/lenovo/x200/devicetree.cb | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/lenovo/x200/devicetree.cb') diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb index d9cb783057..b5d2496eeb 100644 --- a/src/mainboard/lenovo/x200/devicetree.cb +++ b/src/mainboard/lenovo/x200/devicetree.cb @@ -9,7 +9,6 @@ chip northbridge/intel/gm45 register "gpu_panel_power_backlight_off_delay" = "2500" # Tx: 250ms register "gpu_panel_power_cycle_delay" = "3" # T4: 200ms register "gfx.use_spread_spectrum_clock" = "1" - register "gfx.link_frequency_270_mhz" = "1" device cpu_cluster 0 on chip cpu/intel/socket_BGA956 -- cgit v1.2.3