From ac27d3688a862074631e3a1390caf85c068d55cb Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 4 May 2017 19:00:33 +0200 Subject: mb/*/romstage: Don't lock ETR3 CF9GR in early romstage Do not lock ETR3 CF9GR in early romstage. As of Change-Id: I2cb30267a6342db1f3b11715034219ffb18ca678 this is done in bd82x6x's finalize handler. Change-Id: Iea091511f0d2a6128d3a19e9413090c85e4c2e57 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/19570 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/lenovo/x1_carbon_gen1/romstage.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/lenovo/x1_carbon_gen1/romstage.c') diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c index 3e11324f4c..574d02b137 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c @@ -51,8 +51,7 @@ void pch_enable_lpc(void) pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); - pci_write_config32(PCH_LPC_DEV, 0xac, - 0x80010000); + pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } const struct southbridge_usb_port mainboard_usb_ports[] = { -- cgit v1.2.3