From c670a41ca717aefced613aa304da0e95ae4f2a27 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 28 Apr 2017 17:28:32 +0200 Subject: mb/lenvovo/*: Clean mainboard.c and devicetree * Move board specific SPI registers to devicetree * Remove unused headers * Remove obsolete methods * Fix coding style * Fix Thinkpad L520 SPI lvscc register Except for Thinkpad L520, no functional change has been done, just moving stuff around. Change-Id: I692a5632030fe2fedbe9a90f86251000f1360fb2 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/19494 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb') diff --git a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb index e4204dd4a6..ce74d3fef6 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb +++ b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb @@ -77,6 +77,9 @@ chip northbridge/intel/sandybridge register "c2_latency" = "101" # c2 not supported register "p_cnt_throttling_supported" = "1" + register "spi_uvscc" = "0x2005" + register "spi_lvscc" = "0x2005" + device pci 14.0 on subsystemid 0x17aa 0x21f9 end # USB 3.0 Controller -- cgit v1.2.3