From 0caf80d8aaa383d40618343f14ed78774108053d Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 4 Jun 2021 11:18:39 +0200 Subject: bd82x6x boards: Drop redundant `c2_latency` If unspecified, chipset code already uses 101, and 0x65 == 101. Change-Id: I524ca492fa577003df23017756f74a455582132f Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/55212 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/lenovo/x131e/devicetree.cb | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/lenovo/x131e') diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb index dc9e0372e3..abe40b19dc 100644 --- a/src/mainboard/lenovo/x131e/devicetree.cb +++ b/src/mainboard/lenovo/x131e/devicetree.cb @@ -56,7 +56,6 @@ chip northbridge/intel/sandybridge # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "1" - register "c2_latency" = "0x0065" register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" -- cgit v1.2.3