From be6fd4c4b5684fae3fc859158fbb47ca152ffe10 Mon Sep 17 00:00:00 2001 From: James Ye Date: Sat, 22 Jul 2017 19:19:42 +1000 Subject: mb/lenovo: add Lenovo ThinkPad X131e (Intel) The Intel version of ThinkPad X131e can ship with Sandy Bridge or Ivy Bridge processors. The mainboard uses 8MiB+4MiB flash chips, with the 8MiB chip containing the IFD and ME, and the 4MiB chip containing the BIOS. The flash chips can be accessed with an external programmer. This port was primarily created using autoport, with some parts adapted from lenovo/x230 and google/stout. Tested and working: - Machine type 3367AH5 / Intel Celeron 887 (Sandy Bridge) - Boots Debian GNU/Linux 9.2 (Linux 4.9.51) via SeaBIOS - Boot from internal SATA and USB - Native RAM init - Native VGA init - libgfxinit - VGA and HDMI display output - Keyboard, trackpoint, touchpad - Audio (speaker, headphones) - Ethernet (Realtek) - Display backlight - USB 3.0 ports - "Always on" USB port (EHCI debug) - SD card reader - Webcam - Fan and temperature sensors - ACPI S3 (Sleep) - CMOS - TPM Not tested: - WLAN/Bluetooth (Broadcom) - WWAN/mSATA (no card) - Other operating systems Not working or not implemented: - Fn keys - ACPI S4 (Hibernation) "Image mismatch: memory size" Change-Id: If8de3a9308997e2d57aee869023ee9a43a2db872 Signed-off-by: James Ye Reviewed-on: https://review.coreboot.org/20694 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/mainboard/lenovo/x131e/acpi/ec.asl | 24 ++++++++++++++++++ src/mainboard/lenovo/x131e/acpi/platform.asl | 37 ++++++++++++++++++++++++++++ src/mainboard/lenovo/x131e/acpi/superio.asl | 16 ++++++++++++ 3 files changed, 77 insertions(+) create mode 100644 src/mainboard/lenovo/x131e/acpi/ec.asl create mode 100644 src/mainboard/lenovo/x131e/acpi/platform.asl create mode 100644 src/mainboard/lenovo/x131e/acpi/superio.asl (limited to 'src/mainboard/lenovo/x131e/acpi') diff --git a/src/mainboard/lenovo/x131e/acpi/ec.asl b/src/mainboard/lenovo/x131e/acpi/ec.asl new file mode 100644 index 0000000000..02a9d2b66a --- /dev/null +++ b/src/mainboard/lenovo/x131e/acpi/ec.asl @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (c) 2011 Sven Schnelle + * Copyright (c) 2017 James Ye + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define THINKPAD_EC_GPE 22 +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +#define EC_LENOVO_H8_ME_WORKAROUND 1 + +#include diff --git a/src/mainboard/lenovo/x131e/acpi/platform.asl b/src/mainboard/lenovo/x131e/acpi/platform.asl new file mode 100644 index 0000000000..9cd327a765 --- /dev/null +++ b/src/mainboard/lenovo/x131e/acpi/platform.asl @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* The _PTS method (Prepare To Sleep) is called before the OS is + * entering a sleep state. The sleep state number is passed in Arg0 + */ + +Method(_PTS,1) +{ + \_SB.PCI0.LPCB.EC.MUTE(1) + \_SB.PCI0.LPCB.EC.USBP(0) + \_SB.PCI0.LPCB.EC.RADI(0) +} + +/* The _WAK method is called on system wakeup */ + +Method(_WAK,1) +{ + /* ME may not be up yet. */ + Store (0, \_TZ.MEB1) + Store (0, \_TZ.MEB2) + + /* Not implemented. */ + Return(Package(){0,0}) +} diff --git a/src/mainboard/lenovo/x131e/acpi/superio.asl b/src/mainboard/lenovo/x131e/acpi/superio.asl new file mode 100644 index 0000000000..253a358202 --- /dev/null +++ b/src/mainboard/lenovo/x131e/acpi/superio.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 James Ye + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include -- cgit v1.2.3