From 3b947e2094bf127426087489d404c95c62de8825 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 12 Jan 2021 15:01:42 +0200 Subject: mainboards: Move get_cst_entries() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I02cfbcb7a340bd574290e4ac486010fc4cbcd3be Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49351 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/lenovo/t60/Makefile.inc | 1 + src/mainboard/lenovo/t60/cstates.c | 16 ++++++++++++++++ src/mainboard/lenovo/t60/mainboard.c | 12 ------------ 3 files changed, 17 insertions(+), 12 deletions(-) create mode 100644 src/mainboard/lenovo/t60/cstates.c (limited to 'src/mainboard/lenovo/t60') diff --git a/src/mainboard/lenovo/t60/Makefile.inc b/src/mainboard/lenovo/t60/Makefile.inc index 5ded71b41a..000367bc30 100644 --- a/src/mainboard/lenovo/t60/Makefile.inc +++ b/src/mainboard/lenovo/t60/Makefile.inc @@ -7,3 +7,4 @@ bootblock-y += gpio.c romstage-y += gpio.c bootblock-y += early_init.c romstage-y += early_init.c +ramstage-y += cstates.c diff --git a/src/mainboard/lenovo/t60/cstates.c b/src/mainboard/lenovo/t60/cstates.c new file mode 100644 index 0000000000..7a1e4d6001 --- /dev/null +++ b/src/mainboard/lenovo/t60/cstates.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +static acpi_cstate_t cst_entries[] = { + { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } }, + { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } }, + { 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, +}; + +int get_cst_entries(acpi_cstate_t **entries) +{ + *entries = cst_entries; + return ARRAY_SIZE(cst_entries); +} diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index ee5ec8feb8..7ebe25e0af 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -12,18 +12,6 @@ #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT -static acpi_cstate_t cst_entries[] = { - { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } }, - { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } }, - { 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, -}; - -int get_cst_entries(acpi_cstate_t **entries) -{ - *entries = cst_entries; - return ARRAY_SIZE(cst_entries); -} - static void mainboard_init(struct device *dev) { struct southbridge_intel_i82801gx_config *config; -- cgit v1.2.3