From 3d02b9c79e8dbe661c9e784519c486b8897b6af5 Mon Sep 17 00:00:00 2001
From: Philipp Deppenwiese <zaolin@das-labor.org>
Date: Wed, 3 Jun 2015 23:09:36 +0200
Subject: mainboard/lenovo/{t430s,t420s,t520,t530,x220}: Add TPM 1.2 mainboard
 support

Every Lenovo Thinkpad includes a Trusted Platform Module, so we can enable
it for the sandy-/ivybridge platforms.

Change-Id: Icda443ba88c2a49a0033014ce7710dd607fa15dc
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: http://review.coreboot.org/10411
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/mainboard/lenovo/t520/Kconfig       | 1 +
 src/mainboard/lenovo/t520/devicetree.cb | 4 ++++
 src/mainboard/lenovo/t520/dsdt.asl      | 8 ++++++++
 3 files changed, 13 insertions(+)

(limited to 'src/mainboard/lenovo/t520')

diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig
index 98355d41b6..56fa395b28 100644
--- a/src/mainboard/lenovo/t520/Kconfig
+++ b/src/mainboard/lenovo/t520/Kconfig
@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
 	select SANDYBRIDGE_LVDS
+	select MAINBOARD_HAS_LPC_TPM
 
 	# Workaround for EC/KBC IRQ1.
 	select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index 4c396e2645..ff9745ef1c 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -93,6 +93,10 @@ chip northbridge/intel/sandybridge
 					register "dock_event_enable" = "0x01"
 				end
 
+				chip drivers/pc80/tpm
+					device pnp 0c31.0 on end
+				end
+
 				chip ec/lenovo/h8
 					device pnp ff.2 on # dummy
 						io 0x60 = 0x62
diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl
index 42165a10bd..c8591a4fd3 100644
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@@ -52,6 +52,14 @@ DefinitionBlock(
 		}
 	}
 
+	/*
+	 * LPC Trusted Platform Module
+	 */
+	Scope (\_SB.PCI0.LPCB)
+	{
+		#include <drivers/pc80/tpm/acpi/tpm.asl>
+	}
+
 	/* Chipset specific sleep states */
 	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
 }
-- 
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