From 524fc52bdd0d28021484b71f321e7a511fe37cc6 Mon Sep 17 00:00:00 2001 From: Anastasios Koutian Date: Tue, 7 May 2024 20:46:59 +0100 Subject: mb/lenovo/t420: Use vendor default power limits Also set the vendor default TCC offset temperature Change-Id: Ia187b67ae28fbcda7d5d0e35ec64a3b21d97a21b Signed-off-by: Anastasios Koutian Reviewed-on: https://review.coreboot.org/c/coreboot/+/83280 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/lenovo/t420/devicetree.cb | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/mainboard/lenovo/t420') diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index 6b721f3f74..65891f0c30 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -18,6 +18,11 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x50, 0, 0x51, 0}" chip cpu/intel/model_206ax # Values obtained from vendor BIOS + register "tcc_offset" = "3" + register "pl1_mw" = "35000" + register "pl2_mw" = "43750" + register "pp0_current_limit" = "97" + register "pp1_current_limit" = "32" register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}" register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}" register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}" -- cgit v1.2.3