From 14581fc632186ddaad10deb764dd9d87dec5284e Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Fri, 5 Dec 2014 04:25:44 +1100 Subject: mainboard/lenovo/g505s: Toggle on IOMMU support Toggle on in devicetree.cb and build into AGESA by buildOpts.c. Add ACPI and MPTABLES interrupt routers for IOMMU also. Change-Id: Ia838f9b70f09ed1180daeb5382edc08c4b74946c Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/7643 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/mainboard/lenovo/g505s/mptable.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/mainboard/lenovo/g505s/mptable.c') diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c index f47b9d9495..65b1279e47 100644 --- a/src/mainboard/lenovo/g505s/mptable.c +++ b/src/mainboard/lenovo/g505s/mptable.c @@ -118,6 +118,12 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, int_sign, pin) \ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + /* IOMMU */ + PCI_INT(0x0, 0x00, 0x0, 0x10); + PCI_INT(0x0, 0x00, 0x1, 0x11); + PCI_INT(0x0, 0x00, 0x2, 0x12); + PCI_INT(0x0, 0x00, 0x3, 0x13); + /* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); -- cgit v1.2.3