From ac857ca3b166d385caa4faf62b4f1b8fc3b3f2da Mon Sep 17 00:00:00 2001 From: Benjamin Doron Date: Sat, 12 Dec 2020 22:42:41 +0000 Subject: soc/intel/skylake: Drop duplicate PmConfigPciClockRun configuration coreboot already unconditionally enables CLKRUN_EN in SoC common code. Tested on an out-of-tree Acer Aspire VN7-572G, PCCTL[CLKRUN_EN] of LPC is still enabled. Change-Id: I65e85015bdd0f766ca8021a3d4c0b0d799f0ccc5 Signed-off-by: Benjamin Doron Reviewed-on: https://review.coreboot.org/c/coreboot/+/48325 Reviewed-by: Felix Singer Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/kontron/bsl6/devicetree.cb | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/kontron') diff --git a/src/mainboard/kontron/bsl6/devicetree.cb b/src/mainboard/kontron/bsl6/devicetree.cb index 6bdfcaf501..8ad785251d 100644 --- a/src/mainboard/kontron/bsl6/devicetree.cb +++ b/src/mainboard/kontron/bsl6/devicetree.cb @@ -10,7 +10,6 @@ chip soc/intel/skylake register "PmConfigSlpS4MinAssert" = "SLP_S4_MIN_ASSERT_4S" register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S" register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S" - register "PmConfigPciClockRun" = "1" register "PmConfigPwrCycDur" = "RESET_POWER_CYCLE_4S" # VR Settings Configuration for 2 Domains -- cgit v1.2.3