From a8e1168064b34b46494b58480411a11bc98340f6 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 11 Mar 2009 14:54:18 +0000 Subject: This patch contains some significant updates to the i82801gx component and will be required for a series of later patches. Roughly it contains: * fixed SMBus driver (was not compiled in before) * fixed S-ATA/P-ATA combination * Added warnings to drivers being called with a NULL dev->chip_info * Set subsystem ids for those boards that have none specified in Options.lb * Fix license headers. The code was originally released under GPL v2 but some files sneaked in with a v2 or later header. * some attempts to fix azalia/Intel HDA.. not working yet * clean up and fix pci bridge handling code * Add Config based GPI handling to LPC driver * Add HPET enable function * Enable clock gating where appropriate * first attempt at USB debug console support (not working yet) * Add required options to kontron board * many other minor changes Signed-off-by: Stefan Reinauer Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/kontron/986lcd-m/Config.lb | 10 ++++++++-- src/mainboard/kontron/986lcd-m/Options.lb | 21 +++++++++++++++++++-- 2 files changed, 27 insertions(+), 4 deletions(-) (limited to 'src/mainboard/kontron') diff --git a/src/mainboard/kontron/986lcd-m/Config.lb b/src/mainboard/kontron/986lcd-m/Config.lb index 3e378273c2..e5d110c130 100644 --- a/src/mainboard/kontron/986lcd-m/Config.lb +++ b/src/mainboard/kontron/986lcd-m/Config.lb @@ -190,12 +190,18 @@ chip northbridge/intel/i945 chip southbridge/intel/i82801gx register "pirqa_routing" = "0x05" register "pirqb_routing" = "0x07" - register "pirqc_routing" = "0x06" + register "pirqc_routing" = "0x05" register "pirqd_routing" = "0x07" register "pirqe_routing" = "0x80" register "pirqf_routing" = "0x80" register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x05" + register "pirqh_routing" = "0x06" + + # GPI routing + # 0 No effect (default) + # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) + # 2 SCI (if corresponding GPIO_EN bit is also set) + register "gpi13_routing" = "1" register "ide_legacy_combined" = "0x1" register "ide_enable_primary" = "0x1" diff --git a/src/mainboard/kontron/986lcd-m/Options.lb b/src/mainboard/kontron/986lcd-m/Options.lb index 40a8a796fb..d774949100 100644 --- a/src/mainboard/kontron/986lcd-m/Options.lb +++ b/src/mainboard/kontron/986lcd-m/Options.lb @@ -69,6 +69,9 @@ uses XIP_ROM_SIZE uses HAVE_HARD_RESET uses HAVE_SMI_HANDLER uses CONFIG_PCIE_CONFIGSPACE_HOLE +uses MMCONF_SUPPORT +uses MMCONF_BASE_ADDRESS +uses CONFIG_GFXUMA # uses MAINBOARD uses MAINBOARD_PART_NUMBER @@ -86,7 +89,9 @@ uses TTYS0_LCS uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_VGA +uses CONFIG_VGA_ROM_RUN uses CONFIG_PCI_ROM_RUN +uses DEBUG # Toolchain uses CC uses HOSTCC @@ -145,6 +150,13 @@ default HAVE_SMI_HANDLER=1 ## default CONFIG_PCIE_CONFIGSPACE_HOLE=1 +default MMCONF_SUPPORT=1 +default MMCONF_BASE_ADDRESS=0xf0000000 + +## +## UMA +## +default CONFIG_GFXUMA=1 ## ## Build code to export a programmable irq routing table @@ -163,7 +175,7 @@ default HAVE_MP_TABLE=1 ## default HAVE_ACPI_TABLES=1 default HAVE_MAINBOARD_RESOURCES=1 -default HAVE_HIGH_TABLES=0 +default HAVE_HIGH_TABLES=1 ## ## Build code to export a CMOS option table @@ -179,7 +191,12 @@ default LB_CKS_LOC=123 #VGA Console default CONFIG_CONSOLE_VGA=1 -default CONFIG_PCI_ROM_RUN=1 +# There are some network option roms that don't work with +# coreboot's x86emu. Thus, we only execute the VGA option rom +# for now: +default CONFIG_VGA_ROM_RUN=1 +default CONFIG_PCI_ROM_RUN=0 +default DEBUG=0 ## ## Build code for SMP support -- cgit v1.2.3