From 5276941c8b9a3294fda4eb5d102c8333688d29a5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Fri, 17 Jun 2016 07:55:03 +0300
Subject: AMD boards: Fix romstage main() declaration
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Boards incorrectly used intel include file for AMD board.

Change-Id: I6d3172d1aa5c91c989a6ef63066a7cd6f70013f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15232
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/mainboard/jetway/j7f2/romstage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/jetway')

diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c
index 42aaa0c05c..0de239c6fa 100644
--- a/src/mainboard/jetway/j7f2/romstage.c
+++ b/src/mainboard/jetway/j7f2/romstage.c
@@ -23,6 +23,7 @@
 #include <console/console.h>
 #include <northbridge/via/cn700/raminit.h>
 #include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
 #include <delay.h>
 #include "southbridge/via/vt8237r/early_smbus.c"
 #include <superio/fintek/common/fintek.h>
@@ -80,7 +81,6 @@ static const struct mem_controller ctrl = {
 	.channel0 = { DIMM0 },
 };
 
-#include <cpu/intel/romstage.h>
 void main(unsigned long bist)
 {
 	/* Enable multifunction for northbridge. */
-- 
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