From 6d1fdb34105a6ed894ce0aba85b9fb2eb3cf9d33 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 21 Jun 2017 14:44:13 +0200 Subject: AMD fam10: Link southbridge/amd/rs780/early_setup.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Removes rs780_before_pci_init() since it was a no-op anyway. Removes get_nb_rev() since this function is provided via a macro in the header. This Makes a lot of function non-static since the header has prototypes for these. Change-Id: I8933516771d959583bbd59a5c1beee3e30a7004f Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/20297 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/jetway/pa78vm5/romstage.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/jetway/pa78vm5') diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 163b2ebe9d..760fc13aed 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -47,7 +47,7 @@ #include #include #include -#include "southbridge/amd/rs780/early_setup.c" +#include #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" @@ -219,7 +219,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // die("After MCT init before CAR disabled."); - rs780_before_pci_init(); sb7xx_51xx_before_pci_init(); post_code(0x42); -- cgit v1.2.3