From ed2bcaa7310840073ac20f2087bd786d5874bd81 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Thu, 13 Mar 2014 03:33:35 +1100 Subject: mainboard/jetway/nf81-t56n-lf: Fix HWM base addr. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The target board has a different base addr. for its hardware monitor (fans, temp, etc) from the Fintek Super I/O datasheet. Change-Id: Ifc025cb92d0fc4e8f813091d00a6c87deae05863 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5383 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/jetway/nf81-t56n-lf/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/jetway/nf81-t56n-lf') diff --git a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb index 99b226625f..5f49b411ad 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb +++ b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb @@ -80,7 +80,7 @@ chip northbridge/amd/agesa/family14/root_complex drq 0x74 = 3 end device pnp 2e.04 on # Hardware Monitor - io 0x60 = 0x295 + io 0x60 = 0x225 # Fintek datasheet says 0x295. irq 0x70 = 0 end device pnp 2e.05 on # KBC -- cgit v1.2.3