From c072e794e62433d75369b50c7e9c90c50e47ba89 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 21 May 2020 00:28:08 +0200 Subject: AGESA f14/f15tn/f16kb: Factor out AGESA_VERSION_STRING We use the same AGESA version numbers on all but one mainboard, so we might as well factor them out. The only exception is asrock/e350m1, which has the f15tn/f16kb version number even though it actually uses AGESA f14. To preserve reproducibility, do not change it in this commit. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: I0dad2352ccda454d5545f17228d52e4ff4f23f20 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41591 Reviewed-by: Mike Banon Tested-by: build bot (Jenkins) --- src/mainboard/jetway/nf81-t56n-lf/buildOpts.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/mainboard/jetway/nf81-t56n-lf/buildOpts.c') diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c index 1611c2139d..c3c64093f5 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c @@ -215,11 +215,6 @@ const AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] = { CPU_LIST_TERMINAL } }; -/* This is the release version number of the AGESA component - * This string MUST be exactly 12 characters long - */ -#define AGESA_VERSION_STRING {'V', '1', '.', '1', '.', '0', '.', '3', ' ', ' ', ' ', ' '} - /* MEMORY_BUS_SPEED */ #define DDR400_FREQUENCY 200 /**< DDR 400 */ #define DDR533_FREQUENCY 266 /**< DDR 533 */ -- cgit v1.2.3