From 95fe8fb1e0ce2ccf2d079898c27c799e4b0db928 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Thu, 28 Jul 2016 17:20:20 +0200 Subject: mainboard: Format irq_tables.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Run the command below to format the files `irq_tables.c` of (mostly AMD) mainboards correctly with GNU indent 2.2.10. ``` $ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l ``` Fix up the following two checkpatch.pl errors manually. ``` ERROR: that open brace { should be on the previous line #1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129: + uint8_t reg[8] = + { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 }; ERROR: that open brace { should be on the previous line #1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131: + uint8_t irq[8] = + { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 }; ``` This is needed, so that follow-up commits, fixing checkpatch.pl errors and warnings, won’t run into conflicts with the git commit hooks, when for example, spaces instead of tabs are used for indentation. Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a Signed-off-by: Paul Menzel Reviewed-on: https://review.coreboot.org/15932 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch Reviewed-by: Stefan Reinauer --- src/mainboard/iwill/dk8_htx/irq_tables.c | 131 +++++++++++++++++-------------- 1 file changed, 70 insertions(+), 61 deletions(-) (limited to 'src/mainboard/iwill/dk8_htx') diff --git a/src/mainboard/iwill/dk8_htx/irq_tables.c b/src/mainboard/iwill/dk8_htx/irq_tables.c index 9a359e3dd9..e9f13b4298 100644 --- a/src/mainboard/iwill/dk8_htx/irq_tables.c +++ b/src/mainboard/iwill/dk8_htx/irq_tables.c @@ -7,12 +7,14 @@ #include "mb_sysconf.h" -static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, - uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, - uint8_t slot, uint8_t rfu) +static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, + uint8_t devfn, uint8_t link0, uint16_t bitmap0, + uint8_t link1, uint16_t bitmap1, uint8_t link2, + uint16_t bitmap2, uint8_t link3, uint16_t bitmap3, + uint8_t slot, uint8_t rfu) { - pirq_info->bus = bus; - pirq_info->devfn = devfn; + pirq_info->bus = bus; + pirq_info->devfn = devfn; pirq_info->irq[0].link = link0; pirq_info->irq[0].bitmap = bitmap0; @@ -24,12 +26,9 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev pirq_info->irq[3].bitmap = bitmap3; pirq_info->slot = slot; - pirq_info->rfu = rfu; + pirq_info->rfu = rfu; } - - - unsigned long write_pirq_routing_table(unsigned long addr) { @@ -38,30 +37,30 @@ unsigned long write_pirq_routing_table(unsigned long addr) unsigned slot_num; uint8_t *v; - uint8_t sum=0; - int i; + uint8_t sum = 0; + int i; struct mb_sysconf_t *m; - get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c + get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c m = sysconf.mb; - /* Align the table to be 16 byte aligned. */ - addr += 15; - addr &= ~15; + /* Align the table to be 16 byte aligned. */ + addr += 15; + addr &= ~15; - /* This table must be between 0xf0000 & 0x100000 */ - printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr); + /* This table must be between 0xf0000 & 0x100000 */ + printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr); pirq = (void *)(addr); - v = (uint8_t *)(addr); + v = (uint8_t *) (addr); pirq->signature = PIRQ_SIGNATURE; - pirq->version = PIRQ_VERSION; + pirq->version = PIRQ_VERSION; pirq->rtr_bus = m->bus_8111_0; - pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0; + pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0; pirq->exclusive_irqs = 0; @@ -72,37 +71,44 @@ unsigned long write_pirq_routing_table(unsigned long addr) memset(pirq->rfu, 0, sizeof(pirq->rfu)); - pirq_info = (void *) ( &pirq->checksum + 1); + pirq_info = (void *)(&pirq->checksum + 1); slot_num = 0; - { - device_t dev; - dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3)); - if (dev) { - /* initialize PCI interupts - these assignments depend - on the PCB routing of PINTA-D - - PINTA = IRQ3 - PINTB = IRQ5 - PINTC = IRQ10 - PINTD = IRQ11 - */ - pci_write_config16(dev, 0x56, 0xba53); - } - } + { + device_t dev; + dev = + dev_find_slot(m->bus_8111_0, + PCI_DEVFN(sysconf.sbdn + 1, 3)); + if (dev) { + /* initialize PCI interupts - these assignments depend + on the PCB routing of PINTA-D + + PINTA = IRQ3 + PINTB = IRQ5 + PINTC = IRQ10 + PINTD = IRQ11 + */ + pci_write_config16(dev, 0x56, 0xba53); + } + } //pci bridge - printk(BIOS_DEBUG, "setting Onboard AMD Southbridge\n"); - static const unsigned char slotIrqs_1_4[4] = { 3, 5, 10, 11 }; - pci_assign_irqs(m->bus_8111_0, sysconf.sbdn+1, slotIrqs_1_4); - write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); - pirq_info++; slot_num++; - - printk(BIOS_DEBUG, "setting Onboard AMD USB\n"); - static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11}; - pci_assign_irqs(m->bus_8111_1, 0, slotIrqs_8111_1_0); - write_pirq_info(pirq_info, m->bus_8111_1,0, 0, 0, 0, 0, 0, 0, 0x4, 0xdef8, 0, 0); - pirq_info++; slot_num++; + printk(BIOS_DEBUG, "setting Onboard AMD Southbridge\n"); + static const unsigned char slotIrqs_1_4[4] = { 3, 5, 10, 11 }; + pci_assign_irqs(m->bus_8111_0, sysconf.sbdn + 1, slotIrqs_1_4); + write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0, + 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, + 0); + pirq_info++; + slot_num++; + + printk(BIOS_DEBUG, "setting Onboard AMD USB\n"); + static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11 }; + pci_assign_irqs(m->bus_8111_1, 0, slotIrqs_8111_1_0); + write_pirq_info(pirq_info, m->bus_8111_1, 0, 0, 0, 0, 0, 0, 0, 0x4, + 0xdef8, 0, 0); + pirq_info++; + slot_num++; //pcix bridge // write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); @@ -110,30 +116,33 @@ unsigned long write_pirq_routing_table(unsigned long addr) int j = 0; - for(i=1; i< sysconf.hc_possible_num; i++) { - if(!(sysconf.pci1234[i] & 0x1) ) continue; - unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff; - unsigned devn = sysconf.hcdn[i] & 0xff; + for (i = 1; i < sysconf.hc_possible_num; i++) { + if (!(sysconf.pci1234[i] & 0x1)) + continue; + unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff; + unsigned devn = sysconf.hcdn[i] & 0xff; - write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); - pirq_info++; slot_num++; - j++; + write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8, + 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + pirq_info++; + slot_num++; + j++; - } + } pirq->size = 32 + 16 * slot_num; - for (i = 0; i < pirq->size; i++) - sum += v[i]; + for (i = 0; i < pirq->size; i++) + sum += v[i]; sum = pirq->checksum - sum; - if (sum != pirq->checksum) { - pirq->checksum = sum; - } + if (sum != pirq->checksum) { + pirq->checksum = sum; + } printk(BIOS_INFO, "done.\n"); - return (unsigned long) pirq_info; + return (unsigned long)pirq_info; } -- cgit v1.2.3