From 4bab6e79b078c76d0a42883c4b4c9c68615d5a1e Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 3 May 2016 15:53:33 -0700 Subject: intel/sch: Merge northbridge and southbridge in src/soc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I6ea9b9d2353c0d767c837e6d629b45f23b306f6e Signed-off-by: Stefan Reinauer Reviewed-on: https://review.coreboot.org/14599 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Vladimir Serbinenko --- src/mainboard/iwave/iWRainbowG6/romstage.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard/iwave/iWRainbowG6/romstage.c') diff --git a/src/mainboard/iwave/iWRainbowG6/romstage.c b/src/mainboard/iwave/iWRainbowG6/romstage.c index c567a4acf3..37b442c0be 100644 --- a/src/mainboard/iwave/iWRainbowG6/romstage.c +++ b/src/mainboard/iwave/iWRainbowG6/romstage.c @@ -24,7 +24,7 @@ #include #if 0 #include "ram/ramtest.c" -#include "southbridge/intel/sch/early_smbus.c" +#include "soc/intel/sch/early_smbus.c" #endif #define RFID_TEST 0 @@ -268,9 +268,9 @@ int selectcard(void) } #endif -#include "northbridge/intel/sch/early_init.c" -#include -#include "northbridge/intel/sch/raminit.c" +#include "soc/intel/sch/early_init.c" +#include +#include "soc/intel/sch/raminit.c" static void sch_enable_lpc(void) { -- cgit v1.2.3