From 7a593ab0bb6ad33db39d49745a07b382996cc4e9 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 25 Jan 2024 15:15:00 +0100 Subject: soc/intel/xeon_sp/smihandler: Lock SMM_FEATURE_CONTROL on all sockets Remove hardcoded B:D:F numbers for the first socket and pass the PCI addresses to be locked within SMM by using the smm_pci_resource_store. This allows to lock down SMM on all sockets without knowing the actual bus topology or PCI segment group at compile time where the UBOX devices reside on. Tested: SMM is locked on all 4 sockets instead of just one. Change-Id: Ica694911384005681662d3d7bed354a60bf08911 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/80247 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/mainboard/inventec/transformers/ramstage.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/mainboard/inventec') diff --git a/src/mainboard/inventec/transformers/ramstage.c b/src/mainboard/inventec/transformers/ramstage.c index 44539645a8..bc61a90df4 100644 --- a/src/mainboard/inventec/transformers/ramstage.c +++ b/src/mainboard/inventec/transformers/ramstage.c @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include +#include #include #include #include @@ -35,3 +37,8 @@ void mainboard_silicon_init_params(FSPS_UPD *params) /* configure Emmitsburg PCH GPIO controller after FSP-M */ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); } + +void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size) +{ + soc_ubox_store_resources(slots, size); +} -- cgit v1.2.3