From fd305156cda099ae99b7077c87ef1dc8b33d255d Mon Sep 17 00:00:00 2001 From: Vaibhav Shankar Date: Thu, 14 Dec 2017 11:04:21 -0800 Subject: mainboard/intel/cannonlake_rvp: Disable SATA controller SATA was enabled only for internal testing. Since we do not use SATA on chrome platforms, it can be disabled. Change-Id: I907b440562b39e6d97f604e7e63b6b99e487aaa8 Signed-off-by: Vaibhav Shankar Reviewed-on: https://review.coreboot.org/22875 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb | 6 +----- src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb | 6 +----- 2 files changed, 2 insertions(+), 10 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index 2f472e249b..e5157efd07 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -30,10 +30,6 @@ chip soc/intel/cannonlake register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)" - register "SataEnable" = "1" - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" - register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" @@ -95,7 +91,7 @@ chip soc/intel/cannonlake device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 device pci 16.5 off end # Management Engine Interface 4 - device pci 17.0 on end # SATA + device pci 17.0 off end # SATA device pci 19.0 on end # I2C #4 device pci 19.1 off end # I2C #5 device pci 19.2 on end # UART #2 diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index d55259d9a4..36318f4d80 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -30,10 +30,6 @@ chip soc/intel/cannonlake register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)" - register "SataEnable" = "1" - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" - register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" @@ -101,7 +97,7 @@ chip soc/intel/cannonlake device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 device pci 16.5 off end # Management Engine Interface 4 - device pci 17.0 on end # SATA + device pci 17.0 off end # SATA device pci 19.0 on end # I2C #4 device pci 19.1 off end # I2C #5 device pci 19.2 on end # UART #2 -- cgit v1.2.3