From f9544da6c42ccaf43d926191d6c4e0f914d79a59 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Mon, 21 Dec 2020 17:09:08 +0100 Subject: mb/intel/leafhill: do LPC/eSPI pad configuration at board-level MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do LPC/eSPI pad configuration at board-level to match other platforms by adding an appropriate early gpio table in the bootblock. The soc code gets dropped in CB:49410. Change-Id: Ie1e53e72c65fdcfe4be2e01134873aa7858c28ff Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/49416 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/intel/leafhill/bootblock.c | 6 ++++-- src/mainboard/intel/leafhill/brd_gpio_early.h | 16 ++++++++++++++++ 2 files changed, 20 insertions(+), 2 deletions(-) create mode 100644 src/mainboard/intel/leafhill/brd_gpio_early.h (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/leafhill/bootblock.c b/src/mainboard/intel/leafhill/bootblock.c index fdaaaa182b..0f3898a140 100644 --- a/src/mainboard/intel/leafhill/bootblock.c +++ b/src/mainboard/intel/leafhill/bootblock.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include +#include + +#include "brd_gpio_early.h" void bootblock_mainboard_init(void) { - lpc_configure_pads(); + gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } diff --git a/src/mainboard/intel/leafhill/brd_gpio_early.h b/src/mainboard/intel/leafhill/brd_gpio_early.h new file mode 100644 index 0000000000..e44bc706fa --- /dev/null +++ b/src/mainboard/intel/leafhill/brd_gpio_early.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pad_config early_gpio_table[] = { + /* LPC */ + PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_CLKOUT0, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_CLKOUT1, UP_20K, DEEP, NF1) +}; -- cgit v1.2.3