From de82ac77356c3b670493755b32bdad24729461c4 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 14 Oct 2018 13:21:02 +0200 Subject: sb/intel/i82801jx: Use macros for LPC_EN Change-Id: I4a9a9366c85206fa460519a26f48b3aada5bc7c3 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/29100 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/intel/dg43gt/romstage.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index 64b462fb8c..36aa1498b5 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -60,7 +60,10 @@ static void ich10_enable_lpc(void) { /* Configure serial IRQs.*/ pci_write_config16(LPC_DEV, D31F0_LPC_IODEC, 0x0010); - pci_write_config16(LPC_DEV, D31F0_LPC_EN, 0x3f0f); + pci_write_config16(LPC_DEV, D31F0_LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN + | MC_LPC_EN | KBC_LPC_EN | GAMEH_LPC_EN + | GAMEL_LPC_EN | FDD_LPC_EN | LPT_LPC_EN + | COMB_LPC_EN | COMA_LPC_EN); pci_write_config32(LPC_DEV, D31F0_GEN1_DEC, 0xfc0601); pci_write_config32(LPC_DEV, D31F0_GEN2_DEC, 0xfc0291); pci_write_config32(LPC_DEV, D31F0_GEN3_DEC, 0); -- cgit v1.2.3