From 925ea51e4c9b04b84aa35a44644f4a123bc9a3ee Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 4 Jun 2018 10:10:31 +0530 Subject: soc/intel/cannonlake: Add option to skip coreboot MP init This patch provides option for mainboard to skip coreboot MP initialization if required based on use_fsp_mp_init. Option for mainboard to skip coreboot MP initialization * 0 = Make use of coreboot MP Init * 1 = Make use of FSP MP Init Default coreboot does MP initialization for CNL. Change-Id: Ia7da0842996a9db09e6e2b7b201b3a883c3887a2 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/26819 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb | 1 - src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb | 1 - 2 files changed, 2 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index 18aa65d890..d5d806c91e 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -6,7 +6,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "FspSkipMpInit" = "1" register "SmbusEnable" = "1" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 8bcb850f15..4c62800483 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -6,7 +6,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "FspSkipMpInit" = "1" register "SmbusEnable" = "1" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" -- cgit v1.2.3