From 8a36634388c33b2d688ecd13fbe39a01e5de3135 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 2 May 2012 16:39:56 -0700 Subject: Don't pre-enable SATA AHCI in romstage.c In a recent commit the SATA code of Panther Point / Cougar Point was changed to enable AHCI mode depending on the device tree settings rather than a hard code hidden in romstage.c. However, Emerald Lake 2 was not fixed up accordingly. Change-Id: I6c93f386509361e1ab5565b0e4d0e84f0ba282a2 Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/995 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/intel/emeraldlake2/romstage.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 879756bf71..aba89d418f 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -132,9 +132,6 @@ static void early_pch_init(void) reg8 = pci_read_config8(PCH_LPC_DEV, 0xa4); reg8 &= ~(1 << 2); pci_write_config8(PCH_LPC_DEV, 0xa4, reg8); - - // SATA - enable AHCI - pci_write_config16(PCH_SATA_DEV, 0x90, 0x0060); } static void setup_sio_gpios(void) -- cgit v1.2.3