From 798ef2893c44ce3194c539c8c5db33d11e8edbac Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <stepan@coresystems.de>
Date: Mon, 29 Mar 2010 22:08:01 +0000
Subject: This drops the ASSEMBLY define from romstage.c, too (since it's not
 assembly code, this was a dirty hack anyways) Also run     awk 1 RS=
 ORS="\n\n" < $FILE > $FILE.nonewlines     mv $FILE.nonewlines $FILE on
 romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c
 cut some holes into the source.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/intel/d945gclf/romstage.c     | 2 --
 src/mainboard/intel/eagleheights/romstage.c | 3 +--
 src/mainboard/intel/jarrell/romstage.c      | 4 +---
 src/mainboard/intel/mtarvon/romstage.c      | 4 +---
 src/mainboard/intel/truxton/romstage.c      | 3 +--
 src/mainboard/intel/xe7501devkit/romstage.c | 5 +----
 6 files changed, 5 insertions(+), 16 deletions(-)

(limited to 'src/mainboard/intel')

diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index ab3576c944..48f3f78e7b 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -19,7 +19,6 @@
 
 // __PRE_RAM__ means: use "unsigned" for device, not a struct.
 
-
 /* Configuration of the i945 driver */
 #define CHIPSET_I945GC 1
 #define CHANNEL_XOR_RANDOMIZATION 1
@@ -98,7 +97,6 @@ static void ich7_enable_lpc(void)
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x007c0681);
 }
 
-
 /* This box has two superios, so enabling serial becomes slightly excessive.
  * We disable a lot of stuff to make sure that there are no conflicts between
  * the two. Also set up the GPIOs from the beginning. This is the "no schematic
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 6d3673689a..7eb83c9153 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -20,8 +20,6 @@
  * MA 02110-1301 USA
  */
 
-
-
 #include <delay.h>
 
 #include <stdint.h>
@@ -236,3 +234,4 @@ void real_main(unsigned long bist)
 
 /* Use Intel Core (not Core 2) code for CAR init, any CPU might be used. */
 #include "cpu/intel/model_6ex/cache_as_ram_disable.c"
+
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 4660b136dc..04b552fb25 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -1,5 +1,3 @@
-#define ASSEMBLY 1
-
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
@@ -53,7 +51,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 #include "debug.c"
 
-
 static void main(unsigned long bist)
 {
 	/*
@@ -150,3 +147,4 @@ static void main(unsigned long bist)
 	}
 #endif
 }
+
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 7ff8ed9494..f23169736b 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -18,8 +18,6 @@
  *
  */
 
-#define ASSEMBLY 1
-
 #include <stdint.h>
 #include <stdlib.h>
 #include <device/pci_def.h>
@@ -61,7 +59,6 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "lib/generic_sdram.c"
 #include "../jarrell/debug.c"
 
-
 static void main(unsigned long bist)
 {
 	msr_t msr;
@@ -126,3 +123,4 @@ static void main(unsigned long bist)
 
 	ram_check(0, 1024 * 1024);
 }
+
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 0559ecb4f4..b2e04be896 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -18,8 +18,6 @@
  *
  */
 
-#define ASSEMBLY 1
-
 #include <stdint.h>
 #include <stdlib.h>
 #include <device/pci_def.h>
@@ -113,3 +111,4 @@ static void main(unsigned long bist)
 	ram_verify(0x00000000, 0x02000000);
 #endif
 }
+
diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index 157a9f4719..240e917964 100644
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -1,6 +1,3 @@
-#define ASSEMBLY 1
-
-
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
@@ -44,7 +41,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/intel/e7501/reset_test.c"
 #include "lib/generic_sdram.c"
 
-
 // This function MUST appear last (ROMCC limitation)
 static void main(unsigned long bist)
 {
@@ -92,3 +88,4 @@ static void main(unsigned long bist)
 	//		 if the following line is removed.
 	print_debug("SDRAM is up.\r\n");
 }
+
-- 
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