From 6eb7a5316963cb0285fe86286c47491fd213a36b Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 7 Oct 2011 21:42:52 +0200 Subject: mptable: Refactor lintsrc generation We copied pretty much the same code for generating mptable entries for local interrupts (with some notable exceptions). This change moves these lines into a generic function "mptable_lintsrc" and makes use of it in many places. The remaining uses of smp_write_lintsrc should be reviewed and replaced by mptable_lintsrc calls where possible, and smp_write_lintsrc made static. This patch was generated using Coccinelle: @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @m@ identifier mc; expression BUS; @@ -#define IO_LOCAL_INT(type, intr, apicid, pin) smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, BUS, (intr), (apicid), (pin)); ... -IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); -IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, BUS); Change-Id: I97421f820cd039f5fd753cb0da5c1cca68819bb4 Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/244 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/mainboard/intel/d945gclf/mptable.c | 3 +-- src/mainboard/intel/eagleheights/mptable.c | 3 +-- src/mainboard/intel/jarrell/mptable.c | 5 +---- src/mainboard/intel/mtarvon/mptable.c | 5 +---- src/mainboard/intel/truxton/mptable.c | 5 +---- src/mainboard/intel/xe7501devkit/mptable.c | 3 +-- 6 files changed, 6 insertions(+), 18 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c index 641a7ef856..3e26beb9a5 100644 --- a/src/mainboard/intel/d945gclf/mptable.c +++ b/src/mainboard/intel/d945gclf/mptable.c @@ -76,8 +76,7 @@ static void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10); /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1); + mptable_lintsrc(mc, isa_bus); /* Compute the checksums */ mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c index 02744c734f..be89bf89b6 100644 --- a/src/mainboard/intel/eagleheights/mptable.c +++ b/src/mainboard/intel/eagleheights/mptable.c @@ -126,8 +126,7 @@ static void *smp_write_config_table(void *v) mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0); /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0, MP_APIC_ALL, 0); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0, MP_APIC_ALL, 1); + mptable_lintsrc(mc, bus_isa); /* Internal PCI device for i3100 */ diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c index 748eb93d8c..a68aaafbef 100644 --- a/src/mainboard/intel/jarrell/mptable.c +++ b/src/mainboard/intel/jarrell/mptable.c @@ -167,10 +167,7 @@ static void *smp_write_config_table(void *v) bus_isa, 0x0a, 0x08, 0x10); /* Standard local interrupt assignments */ - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, MP_APIC_ALL, 0x00); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, MP_APIC_ALL, 0x01); + mptable_lintsrc(mc, bus_isa); /* FIXME verify I have the irqs handled for all of the risers */ diff --git a/src/mainboard/intel/mtarvon/mptable.c b/src/mainboard/intel/mtarvon/mptable.c index 638d6698f0..6e211f9cc4 100644 --- a/src/mainboard/intel/mtarvon/mptable.c +++ b/src/mainboard/intel/mtarvon/mptable.c @@ -47,10 +47,7 @@ static void *smp_write_config_table(void *v) mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0); /* Standard local interrupt assignments */ - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, MP_APIC_ALL, 0x00); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, MP_APIC_ALL, 0x01); + mptable_lintsrc(mc, bus_isa); /* Internal PCI devices */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, diff --git a/src/mainboard/intel/truxton/mptable.c b/src/mainboard/intel/truxton/mptable.c index 67a73338bf..d8f9787f77 100644 --- a/src/mainboard/intel/truxton/mptable.c +++ b/src/mainboard/intel/truxton/mptable.c @@ -75,10 +75,7 @@ static void *smp_write_config_table(void *v) mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0); /* Standard local interrupt assignments */ - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, MP_APIC_ALL, 0x00); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_isa, 0x00, MP_APIC_ALL, 0x01); + mptable_lintsrc(mc, bus_isa); /* IMCH/IICH PCI devices */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c index acd762194d..f1be1d7388 100644 --- a/src/mainboard/intel/xe7501devkit/mptable.c +++ b/src/mainboard/intel/xe7501devkit/mptable.c @@ -61,8 +61,7 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc) { // Chipset PCI bus // Type Trigger | Polarity Bus ID IRQ APIC ID PIN# - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE |MP_IRQ_POLARITY_HIGH, PCI_BUS_CHIPSET, 0, MP_APIC_ALL, 0); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE |MP_IRQ_POLARITY_HIGH, PCI_BUS_CHIPSET, 0, MP_APIC_ALL, 1); + mptable_lintsrc(mc, PCI_BUS_CHIPSET); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(29, INT_A), IOAPIC_ICH3, 16); // USB 1.1 Controller #1 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(31, INT_B), IOAPIC_ICH3, 17); // SMBus smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(29, INT_C), IOAPIC_ICH3, 18); // USB 1.1 Controller #3 -- cgit v1.2.3