From 50b9258a0bbe6cf99606c87a5b9b835ff0689a7d Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 21 Jul 2016 23:47:38 +0530 Subject: skylake/mainboard: Define mainboard hook in bootblock Move mainboard post console init functionality (google_chrome_ec_init & early_gpio programming) from verstage to bootblock. Add chromeos-ec support in bootblock BUG=chrome-os-partner:55357 BRANCH=none TEST=Built and boot kunimitsu till POST code 0x34 Change-Id: I1b912985a0234d103dcf025b1a88094e639d197d Signed-off-by: Barnali Sarkar Signed-off-by: Rizwan Qureshi Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/15786 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/intel/kunimitsu/Makefile.inc | 6 ++-- .../intel/kunimitsu/bootblock_mainboard.c | 35 ++++++++++++++++++++++ src/mainboard/intel/kunimitsu/car.c | 35 ---------------------- 3 files changed, 38 insertions(+), 38 deletions(-) create mode 100644 src/mainboard/intel/kunimitsu/bootblock_mainboard.c delete mode 100644 src/mainboard/intel/kunimitsu/car.c (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/kunimitsu/Makefile.inc b/src/mainboard/intel/kunimitsu/Makefile.inc index 4bf6e0ab41..cafa12ca60 100644 --- a/src/mainboard/intel/kunimitsu/Makefile.inc +++ b/src/mainboard/intel/kunimitsu/Makefile.inc @@ -16,10 +16,12 @@ subdirs-y += spd +bootblock-y += bootblock_mainboard.c + romstage-y += boardid.c -romstage-y += car.c romstage-y += pei_data.c +bootblock-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c @@ -32,5 +34,3 @@ ramstage-y += pei_data.c ramstage-y += ramstage.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c - -verstage-y += car.c diff --git a/src/mainboard/intel/kunimitsu/bootblock_mainboard.c b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c new file mode 100644 index 0000000000..d514622442 --- /dev/null +++ b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include "gpio.h" + +static void early_config_gpio(void) +{ + /* This is a hack for FSP because it does things in MemoryInit() + * which it shouldn't do. We have to prepare certain gpios here + * because of the brokenness in FSP. */ + gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); +} + +void bootblock_mainboard_init(void) +{ + /* Ensure the EC and PD are in the right mode for recovery */ + google_chromeec_early_init(); + + early_config_gpio(); +} diff --git a/src/mainboard/intel/kunimitsu/car.c b/src/mainboard/intel/kunimitsu/car.c deleted file mode 100644 index 7791b92980..0000000000 --- a/src/mainboard/intel/kunimitsu/car.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include "gpio.h" - -static void early_config_gpio(void) -{ - /* This is a hack for FSP because it does things in MemoryInit() - * which it shouldn't be. We have to prepare certain gpios here - * because of the brokenness in FSP. */ - gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); -} - -void car_mainboard_post_console_init(void) -{ - /* Ensure the EC and PD are in the right mode for recovery */ - google_chromeec_early_init(); - - early_config_gpio(); -} -- cgit v1.2.3