From 3e4e3038584fb2055c482fd346bb821b3d6236fc Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <reinauer@chromium.org>
Date: Wed, 20 Mar 2013 14:08:04 -0700
Subject: Unify coreboot table generation

coreboot tables are, unlike general system tables, a platform
independent concept. Hence, use the same code for coreboot table
generation on all platforms. lib/coreboot_tables.c is based
on the x86 version of the file, because some important fixes
were missed on the ARMv7 version lately.

Change-Id: Icc38baf609f10536a320d21ac64408bef44bb77d
Signed-off-by: Stefan Reinauer <reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/2863
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
---
 src/mainboard/intel/baskingridge/chromeos.c  | 1 -
 src/mainboard/intel/baskingridge/mainboard.c | 2 +-
 src/mainboard/intel/emeraldlake2/chromeos.c  | 2 +-
 src/mainboard/intel/emeraldlake2/mainboard.c | 2 +-
 src/mainboard/intel/wtm1/chromeos.c          | 1 -
 src/mainboard/intel/wtm1/mainboard.c         | 2 +-
 src/mainboard/intel/wtm2/chromeos.c          | 1 -
 src/mainboard/intel/wtm2/mainboard.c         | 2 +-
 8 files changed, 5 insertions(+), 8 deletions(-)

(limited to 'src/mainboard/intel')

diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c
index 5ec6c27907..6bf5116c64 100644
--- a/src/mainboard/intel/baskingridge/chromeos.c
+++ b/src/mainboard/intel/baskingridge/chromeos.c
@@ -27,7 +27,6 @@
 
 #ifndef __PRE_RAM__
 #include <boot/coreboot_tables.h>
-#include <arch/coreboot_tables.h>
 
 #define GPIO_COUNT	6
 #define ACTIVE_LOW	0
diff --git a/src/mainboard/intel/baskingridge/mainboard.c b/src/mainboard/intel/baskingridge/mainboard.c
index 5bd9aec98d..c7b0ee00ac 100644
--- a/src/mainboard/intel/baskingridge/mainboard.c
+++ b/src/mainboard/intel/baskingridge/mainboard.c
@@ -32,7 +32,7 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <arch/coreboot_tables.h>
+#include <boot/coreboot_tables.h>
 #include "hda_verb.h"
 #include <southbridge/intel/lynxpoint/pch.h>
 
diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c
index 8e6a732c8e..4d998ec4e8 100644
--- a/src/mainboard/intel/emeraldlake2/chromeos.c
+++ b/src/mainboard/intel/emeraldlake2/chromeos.c
@@ -25,7 +25,7 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 
 #ifndef __PRE_RAM__
-#include <arch/coreboot_tables.h>
+#include <boot/coreboot_tables.h>
 
 #define GPIO_COUNT	6
 #define ACTIVE_LOW	0
diff --git a/src/mainboard/intel/emeraldlake2/mainboard.c b/src/mainboard/intel/emeraldlake2/mainboard.c
index 5d9e96a2a8..92704c984c 100644
--- a/src/mainboard/intel/emeraldlake2/mainboard.c
+++ b/src/mainboard/intel/emeraldlake2/mainboard.c
@@ -32,7 +32,7 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <arch/coreboot_tables.h>
+#include <boot/coreboot_tables.h>
 #include "hda_verb.h"
 #include <southbridge/intel/bd82x6x/pch.h>
 
diff --git a/src/mainboard/intel/wtm1/chromeos.c b/src/mainboard/intel/wtm1/chromeos.c
index 7cc0ef405c..f8960764f0 100644
--- a/src/mainboard/intel/wtm1/chromeos.c
+++ b/src/mainboard/intel/wtm1/chromeos.c
@@ -26,7 +26,6 @@
 
 #ifndef __PRE_RAM__
 #include <boot/coreboot_tables.h>
-#include <arch/coreboot_tables.h>
 
 #define GPIO_COUNT	6
 #define ACTIVE_LOW	0
diff --git a/src/mainboard/intel/wtm1/mainboard.c b/src/mainboard/intel/wtm1/mainboard.c
index e84b16ecfd..f5b00546f7 100644
--- a/src/mainboard/intel/wtm1/mainboard.c
+++ b/src/mainboard/intel/wtm1/mainboard.c
@@ -32,7 +32,7 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <arch/coreboot_tables.h>
+#include <boot/coreboot_tables.h>
 #include "hda_verb.h"
 #include <southbridge/intel/lynxpoint/pch.h>
 
diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c
index 385791d159..594b4a75d3 100644
--- a/src/mainboard/intel/wtm2/chromeos.c
+++ b/src/mainboard/intel/wtm2/chromeos.c
@@ -30,7 +30,6 @@
 
 #ifndef __PRE_RAM__
 #include <boot/coreboot_tables.h>
-#include <arch/coreboot_tables.h>
 
 #define GPIO_COUNT	6
 #define ACTIVE_LOW	0
diff --git a/src/mainboard/intel/wtm2/mainboard.c b/src/mainboard/intel/wtm2/mainboard.c
index e84b16ecfd..f5b00546f7 100644
--- a/src/mainboard/intel/wtm2/mainboard.c
+++ b/src/mainboard/intel/wtm2/mainboard.c
@@ -32,7 +32,7 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <arch/coreboot_tables.h>
+#include <boot/coreboot_tables.h>
 #include "hda_verb.h"
 #include <southbridge/intel/lynxpoint/pch.h>
 
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