From 2b3416134fa2f1400b764666dd7f1953915029a8 Mon Sep 17 00:00:00 2001 From: Jason Le Date: Thu, 27 Aug 2020 15:16:32 -0700 Subject: mb/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays for TGL-Y RVP - Enable DDC pins for DDI-B - Enable HPD pins for DDI-1/DDI-2 - Update MPHY/USB2 Mapping to match with the TGL-Y RVP schematic BUG: System not able to detect displays attached to onboard micro-HDMI or Type-C connectors TEST: hot-plug/unplug HDMI displays with onboard micro-HDMI connector and USB Type-C connectors to make sure the displays get detected and enabled Change-Id: I08a1b16a8fa45cf0f366661395b9f2aa25c44935 Signed-off-by: Jason Le Reviewed-on: https://review.coreboot.org/c/coreboot/+/45016 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- .../intel/tglrvp/variants/tglrvp_up4/devicetree.cb | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index 3e2b342864..842ae68272 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -21,10 +21,13 @@ chip soc/intel/tigerlake register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # Type-C Port1 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN - register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # M.2 Bluetooth, USB3/2 Type A port1 - register "usb2_ports[3]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A port1 + register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # M.2 Bluetooth, USB3/2 Type A Port1 + register "usb2_ports[3]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A Port 1 register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # Type-C Port2 - register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # Type-C Port3 + register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # Type-C Port3 / MECC + register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Not used + register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Not used + register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Not used register "usb2_ports[9]" = "USB2_PORT_MID(OC3)" # CNVi/BT register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB3/2 Type A port1 @@ -65,9 +68,16 @@ chip soc/intel/tigerlake # enabling EDP in PortA register "DdiPortAConfig" = "1" + register "DdiPortAHpd" = "1" + register "DdiPortADdc" = "0" register "DdiPortBHpd" = "1" + register "DdiPortBDdc" = "1" + register "DdiPortCHpd" = "0" + register "DdiPortCDdc" = "0" register "DdiPort1Hpd" = "1" - register "DdiPort1Ddc" = "1" + register "DdiPort1Ddc" = "0" + register "DdiPort2Hpd" = "1" + register "DdiPort2Ddc" = "0" register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, -- cgit v1.2.3