From 2063197a4f610898c6e258e9fbd58b0bc92c7e85 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 9 Feb 2010 12:21:10 +0000 Subject: Move all the copies of the romstage.inc rule to src/arch/i386/Makefile.inc For that to work, I had to: - Add a CONFIG_ROMCC variable - Set that variable on all ROMCC boards - conditionally choose romcc or gcc rule based on that variable - remove those two rules from all the boards' Makefiles - switch a couple of boards to HAVE_OPTION_TABLE, as they actually have. Also remove the duplication of rules with the sole difference of if they depend on option_table.h or not. Signed-off-by: Patrick Georgi Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/intel/d945gclf/Makefile.inc | 9 --------- src/mainboard/intel/eagleheights/Makefile.inc | 9 --------- src/mainboard/intel/jarrell/Kconfig | 1 + src/mainboard/intel/mtarvon/Kconfig | 1 + src/mainboard/intel/truxton/Kconfig | 1 + src/mainboard/intel/xe7501devkit/Kconfig | 1 + 6 files changed, 4 insertions(+), 18 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/d945gclf/Makefile.inc b/src/mainboard/intel/d945gclf/Makefile.inc index e84032adf5..2d45c26772 100644 --- a/src/mainboard/intel/d945gclf/Makefile.inc +++ b/src/mainboard/intel/d945gclf/Makefile.inc @@ -49,12 +49,3 @@ ldscripts += $(src)/cpu/x86/16bit/reset16.lds ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -ifdef POST_EVALUATION - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h - $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@ - perl -e 's/\.rodata/.rom.data/g' -pi $@ - perl -e 's/\.text/.section .rom.text/g' -pi $@ - -endif - diff --git a/src/mainboard/intel/eagleheights/Makefile.inc b/src/mainboard/intel/eagleheights/Makefile.inc index 0ff563086e..78fac918ab 100644 --- a/src/mainboard/intel/eagleheights/Makefile.inc +++ b/src/mainboard/intel/eagleheights/Makefile.inc @@ -24,12 +24,3 @@ ldscripts += $(src)/cpu/x86/16bit/reset16.lds ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -ifdef POST_EVALUATION - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h - $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@ - perl -e 's/\.rodata/.rom.data/g' -pi $@ - perl -e 's/\.text/.section .rom.text/g' -pi $@ - -endif - diff --git a/src/mainboard/intel/jarrell/Kconfig b/src/mainboard/intel/jarrell/Kconfig index 43bf15b32d..7a17ea7782 100644 --- a/src/mainboard/intel/jarrell/Kconfig +++ b/src/mainboard/intel/jarrell/Kconfig @@ -6,6 +6,7 @@ config BOARD_INTEL_JARRELL select SOUTHBRIDGE_INTEL_PXHD select SOUTHBRIDGE_INTEL_I82801ER select SUPERIO_NSC_PC87427 + select ROMCC select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select UDELAY_TSC diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig index f7df636f97..693914da5b 100644 --- a/src/mainboard/intel/mtarvon/Kconfig +++ b/src/mainboard/intel/mtarvon/Kconfig @@ -5,6 +5,7 @@ config BOARD_INTEL_MTARVON select NORTHBRIDGE_INTEL_I3100 select SOUTHBRIDGE_INTEL_I3100 select SUPERIO_INTEL_I3100 + select ROMCC select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select UDELAY_TSC diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig index 260b8a1a4d..fbc577fffa 100644 --- a/src/mainboard/intel/truxton/Kconfig +++ b/src/mainboard/intel/truxton/Kconfig @@ -6,6 +6,7 @@ config BOARD_INTEL_TRUXTON select SOUTHBRIDGE_INTEL_I3100 select SUPERIO_INTEL_I3100 select SUPERIO_SMSC_SMSCSUPERIO + select ROMCC select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select UDELAY_TSC diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig index 03a3eff6ee..72c1d94fb2 100644 --- a/src/mainboard/intel/xe7501devkit/Kconfig +++ b/src/mainboard/intel/xe7501devkit/Kconfig @@ -6,6 +6,7 @@ config BOARD_INTEL_XE7501DEVKIT select SOUTHBRIDGE_INTEL_I82870 select SOUTHBRIDGE_INTEL_I82801CA select SUPERIO_SMSC_LPC47B272 + select ROMCC select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select UDELAY_TSC -- cgit v1.2.3