From 0f61a4fc98f135c0ed22c67ee3241bf5670a61e2 Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Fri, 16 Oct 2009 16:32:57 +0000 Subject: Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE. Signed-off-by: Myles Watson Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/intel/truxton/Options.lb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/truxton/Options.lb b/src/mainboard/intel/truxton/Options.lb index 3815885005..dab3f45b77 100644 --- a/src/mainboard/intel/truxton/Options.lb +++ b/src/mainboard/intel/truxton/Options.lb @@ -35,7 +35,7 @@ uses CONFIG_ROM_SECTION_SIZE uses CONFIG_ROM_SECTION_OFFSET uses CONFIG_ROM_PAYLOAD uses CONFIG_COMPRESSED_PAYLOAD_LZMA -uses CONFIG_LB_MEM_TOPK +uses CONFIG_RAMTOP uses CONFIG_ROMBASE uses CONFIG_XIP_ROM_SIZE uses CONFIG_XIP_ROM_BASE @@ -157,9 +157,9 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_RAMBASE=0x00100000 ## -## in order to have coreboot running at 0x100000, TOPK has to be set +## in order to have coreboot running at 0x100000, RAMTOP has to be set ## -default CONFIG_LB_MEM_TOPK = 2*1024*1024 +default CONFIG_RAMTOP = 2*1024*1024 ## ## Load the payload from the ROM -- cgit v1.2.3