From c7633f4f5e3693c005791006e6cc788b218770c7 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 13 Jun 2013 17:29:36 -0700 Subject: slippy/falco/peppy: Fix SPD GPIO initialization. SPD GPIOs were being read prior to initialization in romstage_common. To fix, pass the copy_spd function to romstage_common, to be called at the appropriate time (after PCH init, before DRAM init). Change-Id: I2554813e56a58c8c81456f1a53cc8ce9c2030a73 Signed-off-by: Aaron Durbin Signed-off-by: Shawn Nematbakhsh Reviewed-on: https://gerrit.chromium.org/gerrit/58608 Reviewed-on: http://review.coreboot.org/4237 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/intel/wtm2/romstage.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard/intel/wtm2') diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c index f38389c543..0a24e48ba4 100644 --- a/src/mainboard/intel/wtm2/romstage.c +++ b/src/mainboard/intel/wtm2/romstage.c @@ -19,6 +19,7 @@ */ #include +#include #include #include "cpu/intel/haswell/haswell.h" #include "northbridge/intel/haswell/haswell.h" @@ -123,6 +124,7 @@ void mainboard_romstage_entry(unsigned long bist) .gpio_map = &mainboard_gpio_map, .rcba_config = &rcba_config[0], .bist = bist, + .copy_spd = NULL, }; /* Call into the real romstage main with this board's attributes. */ -- cgit v1.2.3