From 07921540dda79d810d8bfc6be211513c238a0d63 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 17 Jun 2016 17:22:00 +0300 Subject: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I02881ce465cb3835a6fa7c06b718aa42d0d327ec Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/15227 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/intel/truxton/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/intel/truxton') diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index 36f54953b9..4b64210c38 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -28,6 +28,7 @@ #include #include "lib/debug.c" // XXX #include +#include #include #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0) @@ -42,8 +43,7 @@ static inline int spd_read_byte(u16 device, u8 address) #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) -#include -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { static const struct mem_controller mch[] = { { -- cgit v1.2.3